---------------------------------------------------------------- -- BSDL model for ISSI's IS61LPS/LPD/VPS/VPD/VF/LF25672 Synchronous SRAM -- Author: S.J. JANG -- Revision History: Rev0.0 (7/14/04) -- Rev0.2.1 (10/19/04) -- ---------------------------------------------------------------- entity IS61LXXVXX25672 is generic (PHYSICAL_PIN_MAP : string := "BGA_11x19"); port ( A : in bit_vector(0 to 17); ADV_b : in bit; ADSP_b : in bit; ADSC_b : in bit; GW_b : in bit; CLK : in bit; DP_A : in bit; DP_B : in bit; DP_C : in bit; DP_D : in bit; DP_E : in bit; DP_F : in bit; DP_G : in bit; DP_H : in bit; DQ_A : in bit_vector(0 to 7); DQ_B : in bit_vector(0 to 7); DQ_C : in bit_vector(0 to 7); DQ_D : in bit_vector(0 to 7); DQ_E : in bit_vector(0 to 7); DQ_F : in bit_vector(0 to 7); DQ_G : in bit_vector(0 to 7); DQ_H : in bit_vector(0 to 7); CE2_b : in bit; CE2 : in bit; CE_b : in bit; BW_A_b : in bit; BW_B_b : in bit; BW_C_b : in bit; BW_D_b : in bit; BW_E_b : in bit; BW_F_b : in bit; BW_G_b : in bit; BW_H_b : in bit; BWE_b : in bit; OE_b : in bit; ZZ : in bit; MODE : in bit; TCK : in bit; TDI : in bit; TDO : out bit; TMS : in bit; NC : linkage bit_vector(0 to 26); Vdd : linkage bit_vector(0 to 13); Vddq : linkage bit_vector(0 to 23); Vss : linkage bit_vector(0 to 29)); use STD_1149_1_1994.all; attribute COMPONENT_CONFORMANCE of IS61LXXVXX25672 : entity is "STD_1149_1_1993"; attribute PIN_MAP of IS61LXXVXX25672 : entity is PHYSICAL_PIN_MAP; constant BGA_11x19: PIN_MAP_STRING := " A: (W6, V6, V5, V4, U4, A9, V9, V8, U8, W7, V7, U6, W5, " & " V3, A3, U5, U7, B7), " & " ADV_b: A7, " & " ADSP_b: A5, " & " ADSC_b: A6, " & " BW_A_b: C9, " & " BW_B_b: B8, " & " BW_C_b: B3, " & " BW_D_b: C4, " & " BW_E_b: C8, " & " BW_F_b: B9, " & " BW_G_b: B4, " & " BW_H_b: C3, " & " GW_b: D7, " & " CLK: K3, " & " DP_A: R10, " & " DP_B: E11, " & " DP_C: E2, " & " DP_D: R1, " & " DP_E: R11, " & " DP_F: E10, " & " DP_G: E1, " & " DP_H: R2, " & " DQ_A: (L10, L11, M10, M11, N10, N11, P10, P11), " & " DQ_B: (A10, A11, B10, B11, C10, C11, D10, D11), " & " DQ_C: (J2, J1, H2, H1, G2, G1, F2, F1), " & " DQ_D: (W2, W1, V2, V1, U2, U1, T2, T1), " & " DQ_E: (T10, T11, U10, U11, V10, V11, W10, W11), " & " DQ_F: (F10, F11, G10, G11, H10, H11, J10, J11), " & " DQ_G: (D2, D1, C2, C1, B2, B1, A2, A1), " & " DQ_H: (P2, P1, N2, N1, M2, M1, L2, L1), " & " CE2: A4, " & " CE2_b: A8, " & " CE_b: C6, " & " OE_b: D6, " & " ZZ: P6, " & " TCK: W9, " & " TDI: W4, " & " TDO: W8, " & " TMS: W3, " & " MODE: T6, " & " NC: (B5, C5, C7, D4, D5, D8, F6, G6, H6, J6, K1, K2, K4, " & " K6, K8, K9, K10, K11, L6, M6, N6, T4, T5, T7, T8, U3, " & " U9), " & " BWE_b: B6, " & " Vdd: (E5, E6, E7, G5, G7, J5, J7, L5, L7, N5, N7, R5, R6, " & " R7), " & " Vddq: (E3, E4, E8, E9, G3, G4, G8, G9, J3, J4, J8, J9, L3, " & " L4, L8, L9, N3, N4, N8, N9, R3, R4, R8, R9), " & " Vss: (D3, D9, F3, F4, F5, F7, F8, F9, H3, H4, H5, H7, H8, " & " H9, K5, K7, M3, M4, M5, M7, M8, M9, P3, P4, P5, P7, " & " P8, P9, T3, T9) " ; attribute TAP_SCAN_IN of TDI : signal is true; attribute TAP_SCAN_OUT of TDO : signal is true; attribute TAP_SCAN_MODE of TMS : signal is true; attribute TAP_SCAN_CLOCK of TCK : signal is (100.0e6, BOTH); attribute INSTRUCTION_LENGTH of IS61LXXVXX25672 : entity is 3; attribute INSTRUCTION_OPCODE of IS61LXXVXX25672 : entity is "EXTEST (000), " & "IDCODE (001), " & "SAMPLEZ (010), " & "SAMPLE (100), " & "BYPASS (111) " ; attribute INSTRUCTION_CAPTURE of IS61LXXVXX25672 : entity is "001"; attribute IDCODE_REGISTER of IS61LXXVXX25672 : entity is "0000" & -- Die Revision Code "0011000101" & -- Defines depth and width "000000" & -- vendor definition "00011010101" & -- ISSI JEDEC ID "1" ; -- Presence Register attribute REGISTER_ACCESS of IS61LXXVXX25672 : entity is "BOUNDARY (EXTEST, SAMPLE, SAMPLEZ), " & "BYPASS (BYPASS) " ; attribute BOUNDARY_LENGTH of IS61LXXVXX25672 : entity is 115; attribute BOUNDARY_REGISTER of IS61LXXVXX25672 : entity is "0 (BC_4, MODE, input, X), " & "1 (BC_4, A(16), input, X), " & "2 (BC_4, A(15), input, X), " & "3 (BC_4, A(12), input, X), " & "4 (BC_4, A(11), input, X), " & "5 (BC_4, A(10), input, X), " & "6 (BC_4, A(9), input, X), " & "7 (BC_4, A(8), input, X), " & "8 (BC_4, A(7), input, X), " & "9 (BC_4, A(6), input, X), " & "10 (BC_4, ZZ, input, X), " & "11 (BC_4, DQ_E(7), input, X), " & "12 (BC_4, DQ_E(6), input, X), " & "13 (BC_4, DQ_E(5), input, X), " & "14 (BC_4, DQ_E(4), input, X), " & "15 (BC_4, DQ_E(3), input, X), " & "16 (BC_4, DQ_E(2), input, X), " & "17 (BC_4, DQ_E(1), input, X), " & "18 (BC_4, DQ_E(0), input, X), " & "19 (BC_4, DP_E , input, X), " & "20 (BC_4, DP_A , input, X), " & "21 (BC_4, DQ_A(7), input, X), " & "22 (BC_4, DQ_A(6), input, X), " & "23 (BC_4, DQ_A(5), input, X), " & "24 (BC_4, DQ_A(4), input, X), " & "25 (BC_4, DQ_A(3), input, X), " & "26 (BC_4, DQ_A(2), input, X), " & "27 (BC_4, DQ_A(1), input, X), " & "28 (BC_4, DQ_A(0), input, X), " & "29 (BC_4, DQ_F(7), input, X), " & "30 (BC_4, DQ_F(6), input, X), " & "31 (BC_4, DQ_F(5), input, X), " & "32 (BC_4, DQ_F(4), input, X), " & "33 (BC_4, DQ_F(3), input, X), " & "34 (BC_4, DQ_F(2), input, X), " & "35 (BC_4, DQ_F(1), input, X), " & "36 (BC_4, DQ_F(0), input, X), " & "37 (BC_4, DP_F , input, X), " & "38 (BC_4, DP_B , input, X), " & "39 (BC_4, DQ_B(7), input, X), " & "40 (BC_4, DQ_B(6), input, X), " & "41 (BC_4, DQ_B(5), input, X), " & "42 (BC_4, DQ_B(4), input, X), " & "43 (BC_4, DQ_B(3), input, X), " & "44 (BC_4, DQ_B(2), input, X), " & "45 (BC_4, DQ_B(1), input, X), " & "46 (BC_4, DQ_B(0), input, X), " & "47 (BC_4, *, internal, X), " & "48 (BC_4, A(5), input, X), " & "49 (BC_4, A(17), input, X), " & "50 (BC_4, ADV_b, input, X), " & "51 (BC_4, ADSP_b, input, X), " & "52 (BC_4, ADSC_b, input, X), " & "53 (BC_4, OE_b, input, X), " & "54 (BC_4, BWE_b, input, X), " & "55 (BC_4, GW_b, input, X), " & "56 (BC_4, CLK, input, X), " & "57 (BC_4, *, internal, X), " & "58 (BC_4, *, internal, X), " & "59 (BC_4, CE2_b, input, X), " & "60 (BC_4, BW_A_b, input, X), " & "61 (BC_4, BW_E_b, input, X), " & "62 (BC_4, BW_B_b, input, X), " & "63 (BC_4, BW_F_b, input, X), " & "64 (BC_4, BW_C_b, input, X), " & "65 (BC_4, BW_G_b, input, X), " & "66 (BC_4, BW_D_b, input, X), " & "67 (BC_4, BW_H_b, input, X), " & "68 (BC_4, CE2, input, X), " & "69 (BC_4, CE_b, input, X), " & "70 (BC_4, A(14), input, X), " & "71 (BC_4, *, internal, X), " & "72 (BC_4, *, internal, X), " & "73 (BC_4, DQ_G(7), input, X), " & "74 (BC_4, DQ_G(6), input, X), " & "75 (BC_4, DQ_G(5), input, X), " & "76 (BC_4, DQ_G(4), input, X), " & "77 (BC_4, DQ_G(3), input, X), " & "78 (BC_4, DQ_G(2), input, X), " & "79 (BC_4, DQ_G(1), input, X), " & "80 (BC_4, DQ_G(0), input, X), " & "81 (BC_4, DP_G, input, X), " & "82 (BC_4, DP_C, input, X), " & "83 (BC_4, DQ_C(7), input, X), " & "84 (BC_4, DQ_C(6), input, X), " & "85 (BC_4, DQ_C(5), input, X), " & "86 (BC_4, DQ_C(4), input, X), " & "87 (BC_4, DQ_C(3), input, X), " & "88 (BC_4, DQ_C(2), input, X), " & "89 (BC_4, DQ_C(1), input, X), " & "90 (BC_4, DQ_C(0), input, X), " & "91 (BC_4, DQ_H(7), input, X), " & "92 (BC_4, DQ_H(6), input, X), " & "93 (BC_4, DQ_H(5), input, X), " & "94 (BC_4, DQ_H(4), input, X), " & "95 (BC_4, DQ_H(3), input, X), " & "96 (BC_4, DQ_H(2), input, X), " & "97 (BC_4, DQ_H(1), input, X), " & "98 (BC_4, DQ_H(0), input, X), " & "99 (BC_4, DP_H , input, X), " & "100 (BC_4, DP_D , input, X), " & "101 (BC_4, DQ_D(7), input, X), " & "102 (BC_4, DQ_D(6), input, X), " & "103 (BC_4, DQ_D(5), input, X), " & "104 (BC_4, DQ_D(4), input, X), " & "105 (BC_4, DQ_D(3), input, X), " & "106 (BC_4, DQ_D(2), input, X), " & "107 (BC_4, DQ_D(1), input, X), " & "108 (BC_4, DQ_D(0), input, X), " & "109 (BC_4, A(13), input, X), " & "110 (BC_4, A(4), input, X), " & "111 (BC_4, A(3), input, X), " & "112 (BC_4, A(2), input, X), " & "113 (BC_4, A(1), input, X), " & "114 (BC_4, A(0), input, X) " ; attribute DESIGN_WARNING of IS61LXXVXX25672:entity is "WARNING: THIS DEVICE OPERATES ON A SUBSET OF IEEE STANDARD 1149.1,"& "THE JTAG INSTRUCTIONS EXTEST IS NOT 1149.1 COMPLIANT."; end IS61LXXVXX25672;